1#include "../../../../../include/ProcessingUnit.hpp"
2#include "../../../../../include/cb_opcodes.hpp"
3#include "../../../../../include/mmu.hpp"
5constexpr int machine_cycles = 4;
6#define totalMachineCycles(n) ((n) * machine_cycles)
8#define DUMMY(name) int name(ProcessingUnit&, MMU&) { return totalMachineCycles(1); }
12 u8 value = cpu.reg(ProcessingUnit::Register::B);
14 u8 result = value | 0x40;
15 cpu.reg(ProcessingUnit::Register::B) = result;
17 return totalMachineCycles(2);
22 u8 value = cpu.reg(ProcessingUnit::Register::C);
24 u8 result = value | 0x40;
25 cpu.reg(ProcessingUnit::Register::C) = result;
27 return totalMachineCycles(2);
32 u8 value = cpu.reg(ProcessingUnit::Register::D);
34 u8 result = value | 0x40;
35 cpu.reg(ProcessingUnit::Register::D) = result;
37 return totalMachineCycles(2);
42 u8 value = cpu.reg(ProcessingUnit::Register::E);
44 u8 result = value | 0x40;
45 cpu.reg(ProcessingUnit::Register::E) = result;
47 return totalMachineCycles(2);
52 u8 value = cpu.reg(ProcessingUnit::Register::H);
54 u8 result = value | 0x40;
55 cpu.reg(ProcessingUnit::Register::H) = result;
57 return totalMachineCycles(2);
62 u8 value = cpu.reg(ProcessingUnit::Register::L);
64 u8 result = value | 0x40;
65 cpu.reg(ProcessingUnit::Register::L) = result;
67 return totalMachineCycles(2);
72 u16 addr = cpu.get_hl();
73 u8 value = mmu.read(addr);
75 u8 result = value | 0x40;
76 mmu.write(addr, result);
78 return totalMachineCycles(4);
83 u8 value = cpu.reg(ProcessingUnit::Register::A);
85 u8 result = value | 0x40;
86 cpu.reg(ProcessingUnit::Register::A) = result;
88 return totalMachineCycles(2);
93 u8 value = cpu.reg(ProcessingUnit::Register::B);
95 u8 result = value | 0x80;
96 cpu.reg(ProcessingUnit::Register::B) = result;
98 return totalMachineCycles(2);
103 u8 value = cpu.reg(ProcessingUnit::Register::C);
105 u8 result = value | 0x80;
106 cpu.reg(ProcessingUnit::Register::C) = result;
108 return totalMachineCycles(2);
113 u8 value = cpu.reg(ProcessingUnit::Register::D);
115 u8 result = value | 0x80;
116 cpu.reg(ProcessingUnit::Register::D) = result;
118 return totalMachineCycles(2);
123 u8 value = cpu.reg(ProcessingUnit::Register::E);
125 u8 result = value | 0x80;
126 cpu.reg(ProcessingUnit::Register::E) = result;
128 return totalMachineCycles(2);
133 u8 value = cpu.reg(ProcessingUnit::Register::H);
135 u8 result = value | 0x80;
136 cpu.reg(ProcessingUnit::Register::H) = result;
138 return totalMachineCycles(2);
143 u8 value = cpu.reg(ProcessingUnit::Register::L);
145 u8 result = value | 0x80;
146 cpu.reg(ProcessingUnit::Register::L) = result;
148 return totalMachineCycles(2);
153 u16 addr = cpu.get_hl();
154 u8 value = mmu.read(addr);
156 u8 result = value | 0x80;
157 mmu.write(addr, result);
159 return totalMachineCycles(4);
164 u8 value = cpu.reg(ProcessingUnit::Register::A);
166 u8 result = value | 0x80;
167 cpu.reg(ProcessingUnit::Register::A) = result;
169 return totalMachineCycles(2);