GameBoy Emulator 1
Game Boy emulator core and tooling
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op_0A.cpp
1#include "../../../../../include/ProcessingUnit.hpp"
2#include "../../../../../include/opcodes.hpp"
3#include "../../../../../include/mmu.hpp"
4
5constexpr int machine_cycles = 4;
6#define totalMachineCycles(n) ((n) * machine_cycles)
7
8#define DUMMY(name) int name(ProcessingUnit&, MMU&) { return totalMachineCycles(1); }
9
10int op_and_b(ProcessingUnit& cpu, MMU& mmu) // 0xA0
11{
12 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::B);
13 cpu.reg(ProcessingUnit::Register::A) = result;
14
15 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
16 cpu.setFlag(ProcessingUnit::Flag::N, false);
17 cpu.setFlag(ProcessingUnit::Flag::H, true);
18 cpu.setFlag(ProcessingUnit::Flag::C, false);
19
20 return totalMachineCycles(1);
21}
22
23int op_and_c(ProcessingUnit& cpu, MMU& mmu) // 0xA1
24{
25 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::C);
26 cpu.reg(ProcessingUnit::Register::A) = result;
27
28 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
29 cpu.setFlag(ProcessingUnit::Flag::N, false);
30 cpu.setFlag(ProcessingUnit::Flag::H, true);
31 cpu.setFlag(ProcessingUnit::Flag::C, false);
32
33 return totalMachineCycles(1);
34}
35
36int op_and_d(ProcessingUnit& cpu, MMU& mmu) // 0xA2
37{
38 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::D);
39 cpu.reg(ProcessingUnit::Register::A) = result;
40
41 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
42 cpu.setFlag(ProcessingUnit::Flag::N, false);
43 cpu.setFlag(ProcessingUnit::Flag::H, true);
44 cpu.setFlag(ProcessingUnit::Flag::C, false);
45
46 return totalMachineCycles(1);
47}
48
49int op_and_e(ProcessingUnit& cpu, MMU& mmu) // 0xA3
50{
51 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::E);
52 cpu.reg(ProcessingUnit::Register::A) = result;
53
54 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
55 cpu.setFlag(ProcessingUnit::Flag::N, false);
56 cpu.setFlag(ProcessingUnit::Flag::H, true);
57 cpu.setFlag(ProcessingUnit::Flag::C, false);
58
59 return totalMachineCycles(1);
60}
61
62int op_and_h(ProcessingUnit& cpu, MMU& mmu) // 0xA4
63{
64 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::H);
65 cpu.reg(ProcessingUnit::Register::A) = result;
66
67 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
68 cpu.setFlag(ProcessingUnit::Flag::N, false);
69 cpu.setFlag(ProcessingUnit::Flag::H, true);
70 cpu.setFlag(ProcessingUnit::Flag::C, false);
71
72 return totalMachineCycles(1);
73}
74
75int op_and_l(ProcessingUnit& cpu, MMU& mmu) // 0xA5
76{
77 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::L);
78 cpu.reg(ProcessingUnit::Register::A) = result;
79
80 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
81 cpu.setFlag(ProcessingUnit::Flag::N, false);
82 cpu.setFlag(ProcessingUnit::Flag::H, true);
83 cpu.setFlag(ProcessingUnit::Flag::C, false);
84
85 return totalMachineCycles(1);
86}
87
88int op_and_hl(ProcessingUnit& cpu, MMU& mmu) // 0xA6
89{
90 const u8 value = mmu.read(cpu.get_hl());
91 const u8 result = cpu.reg(ProcessingUnit::Register::A) & value;
92 cpu.reg(ProcessingUnit::Register::A) = result;
93
94 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
95 cpu.setFlag(ProcessingUnit::Flag::N, false);
96 cpu.setFlag(ProcessingUnit::Flag::H, true);
97 cpu.setFlag(ProcessingUnit::Flag::C, false);
98
99 return totalMachineCycles(2);
100}
101
102int op_and_a(ProcessingUnit& cpu, MMU& mmu) // 0xA7
103{
104 const u8 result = cpu.reg(ProcessingUnit::Register::A) & cpu.reg(ProcessingUnit::Register::A);
105 cpu.reg(ProcessingUnit::Register::A) = result;
106
107 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
108 cpu.setFlag(ProcessingUnit::Flag::N, false);
109 cpu.setFlag(ProcessingUnit::Flag::H, true);
110 cpu.setFlag(ProcessingUnit::Flag::C, false);
111
112 return totalMachineCycles(1);
113}
114
115int op_xor_b(ProcessingUnit& cpu, MMU& mmu) // 0xA8
116{
117 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::B);
118 cpu.reg(ProcessingUnit::Register::A) = result;
119
120 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
121 cpu.setFlag(ProcessingUnit::Flag::N, false);
122 cpu.setFlag(ProcessingUnit::Flag::H, false);
123 cpu.setFlag(ProcessingUnit::Flag::C, false);
124
125 return totalMachineCycles(1);
126}
127
128int op_xor_c(ProcessingUnit& cpu, MMU& mmu) // 0xA9
129{
130 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::C);
131 cpu.reg(ProcessingUnit::Register::A) = result;
132
133 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
134 cpu.setFlag(ProcessingUnit::Flag::N, false);
135 cpu.setFlag(ProcessingUnit::Flag::H, false);
136 cpu.setFlag(ProcessingUnit::Flag::C, false);
137
138 return totalMachineCycles(1);
139}
140
141int op_xor_d(ProcessingUnit& cpu, MMU& mmu) // 0xAA
142{
143 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::D);
144 cpu.reg(ProcessingUnit::Register::A) = result;
145
146 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
147 cpu.setFlag(ProcessingUnit::Flag::N, false);
148 cpu.setFlag(ProcessingUnit::Flag::H, false);
149 cpu.setFlag(ProcessingUnit::Flag::C, false);
150
151 return totalMachineCycles(1);
152}
153
154int op_xor_e(ProcessingUnit& cpu, MMU& mmu) // 0xAB
155{
156 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::E);
157 cpu.reg(ProcessingUnit::Register::A) = result;
158
159 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
160 cpu.setFlag(ProcessingUnit::Flag::N, false);
161 cpu.setFlag(ProcessingUnit::Flag::H, false);
162 cpu.setFlag(ProcessingUnit::Flag::C, false);
163
164 return totalMachineCycles(1);
165}
166
167int op_xor_h(ProcessingUnit& cpu, MMU& mmu) // 0xAC
168{
169 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::H);
170 cpu.reg(ProcessingUnit::Register::A) = result;
171
172 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
173 cpu.setFlag(ProcessingUnit::Flag::N, false);
174 cpu.setFlag(ProcessingUnit::Flag::H, false);
175 cpu.setFlag(ProcessingUnit::Flag::C, false);
176
177 return totalMachineCycles(1);
178}
179
180int op_xor_l(ProcessingUnit& cpu, MMU& mmu) // 0xAD
181{
182 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::L);
183 cpu.reg(ProcessingUnit::Register::A) = result;
184
185 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
186 cpu.setFlag(ProcessingUnit::Flag::N, false);
187 cpu.setFlag(ProcessingUnit::Flag::H, false);
188 cpu.setFlag(ProcessingUnit::Flag::C, false);
189
190 return totalMachineCycles(1);
191}
192
193int op_xor_hl(ProcessingUnit& cpu, MMU& mmu) // 0xAE
194{
195 const u8 value = mmu.read(cpu.get_hl());
196 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ value;
197 cpu.reg(ProcessingUnit::Register::A) = result;
198
199 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
200 cpu.setFlag(ProcessingUnit::Flag::N, false);
201 cpu.setFlag(ProcessingUnit::Flag::H, false);
202 cpu.setFlag(ProcessingUnit::Flag::C, false);
203
204 return totalMachineCycles(2);
205}
206
207int op_xor_a(ProcessingUnit& cpu, MMU& mmu) // 0xAF
208{
209 const u8 result = cpu.reg(ProcessingUnit::Register::A) ^ cpu.reg(ProcessingUnit::Register::A);
210 cpu.reg(ProcessingUnit::Register::A) = result;
211
212 cpu.setFlag(ProcessingUnit::Flag::Z, result == 0);
213 cpu.setFlag(ProcessingUnit::Flag::N, false);
214 cpu.setFlag(ProcessingUnit::Flag::H, false);
215 cpu.setFlag(ProcessingUnit::Flag::C, false);
216
217 return totalMachineCycles(1);
218}
MMU
Definition mmu.hpp:12